Design of interface circuit of closed-loop accelerometer with self-test function

LIU Yun-tao; YIN Liang; CHEN Wei-ping; WU Qun

doi:null

您当前的位置：

首页 >

文章列表页 >

Design of interface circuit of closed-loop accelerometer with self-test function

Article | 更新时间：2020-08-12

- Design of interface circuit of closed-loop accelerometer with self-test function
- Optics and Precision Engineering Vol. 17, Issue 6, Pages: 1379-1384(2009)
- 作者机构：
  
  1. 哈尔滨工业大学 MEMS中心,黑龙江哈尔滨150001
  2. 哈尔滨工程大学信息与通信工程学院,黑龙江哈尔滨 150001
  3. 微系统与微结构制造教育部重点实验室,黑龙江哈尔滨 150001
- 作者简介：
- 基金信息：
- DOI：
  CLC： TH824.4
- Received：20 January 2009，
  
  Revised：30 April 2009，
  
  Published Online：20 June 2009，
  
  Published：20 June 2009
- 稿件说明：
移动端阅览
刘云涛,尹亮,陈伟平,吴群. 具有自检测功能的闭环加速度计接口电路设计[J]. 光学精密工程, 2009,17(6):1379-1384

LIU Yun-tao, YIN Liang, CHEN Wei-ping, et al. Design of interface circuit of closed-loop accelerometer with self-test function[J]. Optics and precision engineering, 2009, 17(6): 1379-1384.
刘云涛,尹亮,陈伟平,吴群. 具有自检测功能的闭环加速度计接口电路设计[J]. 光学精密工程, 2009,17(6):1379-1384 DOI：

LIU Yun-tao, YIN Liang, CHEN Wei-ping, et al. Design of interface circuit of closed-loop accelerometer with self-test function[J]. Optics and precision engineering, 2009, 17(6): 1379-1384. DOI：

摘要

为了改善微机电系统(MEMS)电容式加速度计的噪声特性

提出了一种基于开关电容的低噪声闭环接口电路。该电路采用电荷积分器作为前级预放大装置

对寄生电容不敏感

而且具有非常低的噪声。采用相关双采样(CDS)技术消除了1/

噪声和运算放大器失调电压的影响。同时

为了改善系统的动态响应特性

反馈部分采用积分电路

提高了系统阻尼比和响应速度。利用电荷泻放通道实现了自检测功能。采用0.5 μm CMOS工艺完成了版图设计

仿真结果表明

系统灵敏度为0.115 V/

非线性度＜0.12%

可检测的最小加速度为20 μ

自检测输出与自检测电压成正比。

Abstract

A low-noise closed-loop interface circuit based on a switched-capacitor is presented to improve the noise performance of a MEMS capacitive accelerometer. A charge integrator is adopted as pre-amplifier

which is insensitive to parasitic capacitance and has a very low noise level. The Correlated Double Sampling (CDS) technique is applied to eliminate the 1/

noise and the offset of an operational amplifier. Meanwhile

in order to improve dynamic response performance

an integration circuit is introduced to enhance the damping ratio of system and to increase the response speed. The self-test function is also realized by utilizing the same route with charge-discharging. Finally

an elaborate layout design with 0.5 μm CMOS process is completed. The post-simulation results indicate that the sensitivity of the system is 0.115 V/

nonlinearity is less than 0.12%

minimum acceleration detected can be up to 20μ

and the self-test output is proportional to the self-test voltage.

关键词

Keywords

references

Views

432

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Co-simulation of MEMS and circuits in Zeni VLG

Jitter measurement of giant steerable science mirror prototype

Dynamic linearity calibration system for accelerometers with high measurement range

Interface circuit for digital close-loop capacitive microaccelerometer with time division multiplexing

CMOS interface circuit for closed-loop accelerometer

Related Author

YUAN Wei-zheng

NIU Hao-bin

CHANG Hong-long

MA Bing-he

Jing-xu ZHANG

Qi-chang AN

Hong-chao ZHAO

Fei YANG

Related Institution

西北工业大学陕西省微/纳米系统重点实验室

University of Chinese Academy of Sciences

Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences

School of Instrument and Electronics, North University of China

National Defense Science and Technology Key Laboratory of Electronic Test & Measurement, North University of China

AI问答

Address：No.3888 Dong Nanhu Road, Changchun, Jilin, China Postal code：130033
Tel：0431-86176855 Email：gxjmgc@ciomp.ac.cn
Technical support is provided by Beijing Founder electronics co., LTD 吉ICP备11002662号-17 京公网安备11010802024621
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰