CMOS interface circuit for closed-loop accelerometer

YIN Liang; CHEN Wei-ping; LIU Xiao-wei; ZHOU Zhi-ping

doi:null

您当前的位置：

首页 >

文章列表页 >

CMOS interface circuit for closed-loop accelerometer

Article | 更新时间：2020-08-12

- CMOS interface circuit for closed-loop accelerometer
- Optics and Precision Engineering Vol. 17, Issue 6, Pages: 1311-1315(2009)
- 作者机构：
  
  1. 哈尔滨工业大学微电子技术与科学系,黑龙江哈尔滨 150001
  2. 哈尔滨工业大学微系统与微结构制造教育部重点实验室,黑龙江哈尔滨 150001
- 作者简介：
- 基金信息：
- DOI：
  CLC： TH824.4
- Received：20 January 2009，
  
  Revised：30 April 2009，
  
  Published Online：20 June 2009，
  
  Published：20 June 2009
- 稿件说明：
移动端阅览
尹亮,陈伟平,刘晓为,周治平. 闭环加速度计CMOS接口电路[J]. 光学精密工程, 2009,17(6):1311-1315

YIN Liang, CHEN Wei-ping, LIU Xiao-wei, et al. CMOS interface circuit for closed-loop accelerometer[J]. Optics and precision engineering, 2009, 17(6): 1311-1315.
尹亮,陈伟平,刘晓为,周治平. 闭环加速度计CMOS接口电路[J]. 光学精密工程, 2009,17(6):1311-1315 DOI：

YIN Liang, CHEN Wei-ping, LIU Xiao-wei, et al. CMOS interface circuit for closed-loop accelerometer[J]. Optics and precision engineering, 2009, 17(6): 1311-1315. DOI：

摘要

采用高压18 V CMOS集成电路工艺

设计了一种开关电容闭环加速度计接口电路芯片。芯片电路中包括开关电容型电荷敏感放大器

PID控制电路以及相关双采样电路。采用相关双采样技术并用大面积PMOS晶体管作前级放大器输入级来消除放大器的1/

噪声、失调电压及

KT/C

噪声;用高环路增益及静电力平衡技术消除后级电路的1/

噪声、电荷注入和时钟馈通。在相同电极的条件下

利用电荷检测与静电力反馈时域分离法

有效地消除了驱动馈通的影响。设计的芯片采用18 V电源电压供电

闭环加速度计刻度因子为420 mV/

噪声密度为10 μ

/ Hz

芯片面积为15.2 mm

。

Abstract

An 18 V switched-capacitor CMOS interface circuit for the closed-loop operation of a capacitive accelerometer is designed. The circuit consists of a switched-capacitor charge sense amplifier

a PID control circuit and a correlated double sampling circuit. The effects of the 1/

noise of the amplifier and the offset voltage of an op-amp

as well as the

kT/C

charge noise from the parasitic capacitor are suppressed

by taking large area PMOS transistors at the Charge Sensing Amplifier(CSA)as an input stage and using a Correlated Double Sampling (CDS ) technique and the 1/

noise

charge injection and clock feedthrough effects in the back-end circuits are eliminated by the technologies of high loop gain and force feedback. Moreover

the strong driving feedthrough is avoided by separating the drive and sense operations in the time domain by using the same electrodes. The designed complete chip with an area of 15.2 mm

is fabricated in a 2 μm two-metal and two-poly n-well CMOS and operated by a single 18 V supply

which can offer a measuring sensitivity of 420 mV/

and a noise of floor of 10 μ

/ Hz in closed-loop.

关键词

Keywords

references

Views

163

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Research on fall detection system based on support vector machine

Interface circuit for digital close-loop capacitive microaccelerometer with time division multiplexing

Design and experiment of high-overload capacitive micro-machined accelerometers

Co-simulation of MEMS and circuits in Zeni VLG

Design of interface circuit of closed-loop accelerometer with self-test function

Related Author

Ping-ping JIANG

Guo-zheng YAN

Li-ran PEI

DONG Jing-xin

LIU Yun-feng

CHI Bao-yong

CHU Yi-xing

DONG Jing-xin

Related Institution

School of Electrical Information and Electrical Engineering, Shanghai Jiao Tong University

State Key Laboratory for Precision Measurement Technology and Instruments, Department of Precision Instruments, Tsinghua University

Institute of Microelectronics, Tsinghua University

Department of Precision Instrument, Tsinghua University

西北工业大学陕西省微/纳米系统重点实验室

AI问答

Address：No.3888 Dong Nanhu Road, Changchun, Jilin, China Postal code：130033
Tel：0431-86176855 Email：gxjmgc@ciomp.ac.cn
Technical support is provided by Beijing Founder electronics co., LTD 吉ICP备11002662号-17 京公网安备11010802024621
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰