Design and implementation of high performance reconfigurable integrated electronic system for micro/nano-satellite

Tian-yu FENG; Jian CHEN

doi:10.37188/OPE.20202809.2056

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Design and implementation of high performance reconfigurable integrated electronic system for micro/nano-satellite

Micro/Nano Technology and Fine Mechanics | 更新时间：2020-09-28

- Design and implementation of high performance reconfigurable integrated electronic system for micro/nano-satellite
- Optics and Precision Engineering Vol. 28, Issue 9, Pages: 2056-2064(2020)
- 作者机构：
  
  哈尔滨工业大学航天学院卫星技术研究所, 黑龙江哈尔滨 150001
- 作者简介：
- 基金信息：
- DOI：10.37188/OPE.20202809.2056
  CLC： TP394.1;TH691.9
- Received：24 March 2020，
  
  Revised：26 May 2020，
  
  Accepted：26 May 2020，
  
  Published：25 September 2020
- 稿件说明：
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Tian-yu FENG, Jian CHEN. Design and implementation of high performance reconfigurable integrated electronic system for micro/nano-satellite[J]. Optics and precision engineering, 2020, 28(9): 2056-2064.
DOI：

Tian-yu FENG, Jian CHEN. Design and implementation of high performance reconfigurable integrated electronic system for micro/nano-satellite[J]. Optics and precision engineering, 2020, 28(9): 2056-2064. DOI： 10.37188/OPE.20202809.2056.

摘要

为了提高卫星星上资源利用率及集成度，实现对卫星星上资源的充分利用，综合考虑体积、质量及功耗等多方面限制及要求，提出一套基于可重构系统的微纳卫星综合电子系统方案。该方案提出利用分布式专用模块及通用中心处理器提高卫星系统功能集成度，在不降低整星系统可靠性的基础上减少电路设计冗余。首先，通过选用双高性能CPU冷备份，配合外部电路设计，实现了高可靠性高性能计算功能；其次，通过标准化系统总线，将电源及热控，姿态轨道控制，载荷管理等功能模块中的专用电路与计算处理控制功能解耦，将其中的计算控制功能通过综合电子CPU软件重构的方式实现；最后设计并研制了一台功能样机，重量约为0.2 kg，功耗小于2 W，系统计算能力大于220 DMIPS，具备双CPU冷备份功能，满足微纳卫星低功耗较高可靠性的要求，同时该样机可通过通用系统总线扩展不同功能，实现在各种微纳卫星中的应用。

Abstract

To improve the level of integration and maximize the use of on-board resources by considering the size

mass

and power consumption

a set of integrated electronic system based on reconfigurable software is proposed. By using a distributed functional module and a generic processor

high level of integration

less redundancy

and high function density are achieved without reducing reliability. First

a high computing capability is realized using a high-performance processor with a cold backup processor and an external circuit design. The standardized communication bus among the systems helps in decoupling the dedicated circuits and the general computing and control circuits in the electric power system

altitude and orbit control system

and other systems. Computing and control are achieved using reconfigurable modular software that runs in the main processor. Finally

a test prototype is designed and tested. The prototype consumes less than 2 W of power

achieves computing capability of more than 220 Dhrystone million instructions per second

and fits in a single CubeSat sized printed circuit board that weighs less than 0.2 kg

which satisfies the requirements of high reliability

low power consumption

and ability for expansion needed by micro/nanosatellites. By adding different functions through the system bus

this system can also satisfy other satellite requirements.

关键词

Keywords

references

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