High-accuracy TDC for laser range finder

FENG Zhi-hui; LIU En-hai

doi:10.3788/OPE.20101812.2665

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High-accuracy TDC for laser range finder

Article | 更新时间：2020-08-12

- High-accuracy TDC for laser range finder
- Optics and Precision Engineering Vol. 18, Issue 12, Pages: 2665-2671(2010)
- 作者机构：
  
  1. 中国科学院光电技术研究所, 四川成都 610209
  2. 中国科学院研究生院,北京 100039
- 作者简介：
- 基金信息：
- DOI：10.3788/OPE.20101812.2665
  CLC： TN249;TN709
- Received：16 March 2010，
  
  Revised：07 May 2010，
  
  Published Online：25 December 2010，
  
  Published：25 December 2010
- 稿件说明：
移动端阅览
冯志辉, 刘恩海. 用于激光测距的高精度时间数字转换电路[J]. 光学精密工程, 2010,18(12): 2665-2671

FENG Zhi-hui, LIU En-hai. High-accuracy TDC for laser range finder[J]. Editorial Office of Optics and Precision Engineering, 2010,18(12): 2665-2671
冯志辉, 刘恩海. 用于激光测距的高精度时间数字转换电路[J]. 光学精密工程, 2010,18(12): 2665-2671 DOI： 10.3788/OPE.20101812.2665.

FENG Zhi-hui, LIU En-hai. High-accuracy TDC for laser range finder[J]. Editorial Office of Optics and Precision Engineering, 2010,18(12): 2665-2671 DOI： 10.3788/OPE.20101812.2665.

摘要

针对大容量现场可编程门阵列(FPGA)时间数字转换电路线性度较差的问题

采用小容量FPGA实现了用于激光测距的高精度、高线性度时间数字转换电路。通过对高速计数器、数字插入方法、编码器硬件算法的研究

分析了影响时间数字转换电路精度和非线性误差的因素

提出了一种降低非线性误差的方法。首先

根据所分析的影响因素

解决了高速锁存的问题

在单片小容量FGPA XC2V250上实现了时间数字转换电路;接着

通过USB接口将携带时间信息的计数器值和温度计码转为二进制编码值传给PC机

进行计算和显示;最后

设计了延时测量电路

对所设计的时间数字转换电路进行了测试

得到了各个延时单元延时的大小

并进行了数据分析和处理。测试结果显示:时间数字转换电路单次测时分辨率约为80 ps

校正后可达40 ps左右

微分非线性误差为-0.524LSB~+0.448LSB

积分非线性误差为-1.598LSB~+1.492LSB

可以满足飞行时间法激光测距中高精度测时的要求。

Abstract

A low-density Field Programmble Gate Array(FPGA) was chosen to realize a high-accuracy

low nonlinearity Time-to-Digital Converter(TDC) circuit to a laser range finder

for the high-density FPGA TDC circuit showed a worst linearity. The high-speed counter

interpolator methods and the encoder algorithm were studied

and the factors effecting on the high-resolution and nonlinearity of TDC circuit implemented in a single FPGA were analyzed.Then

a method to reduce the nonlinearity of TDC circuit was proposed. Focusing on the method

a high-speed latch problem was settled based on the above factors

and a TDC circuit was designed by a low-density FPGA XC2V250. A USB interface was used to transfer the time signal into the digital code to a PC to be calculated and displayed. Finally

a time measurement circuit was designed to measure the delay time of TDC delay cells. Obtained delay time was processed and analyzed

and experimental results indicate that the single plot precision of the TDC circuit is about 80 ps

and the time interval resolution after calibration can reach 40 ps. The differential nonlinearity and integral nonlinearity of TDC circuit are between -0.524LSB and +0.448LSB

-1.598LSB and +1.492LSB

respectively.

关键词

Keywords

references

宋健.基于FPGA的精密时间-数字转换电路研究 . 合肥:中国科技大学,2006. SONG J.Investigation into the time-to-digital converter based on FPGA .Hefei:Graduate University of Science and Technology of China, 2006. (in Chinese)[2] NUTT R. Digital time intervals meter [J]. Rev. Sci. Instrum, 1968,39:1342-1345.[3] KALISZ J,SZPLET R,PONIECKI A. Field programmable gate array based time-to-digital converter with 200-ps resolution [J].IEEE Trans. Instrum. Meas, 1997,46(1):51-55.[4] DUDEK P, SZCZEPANSKI S, HATFIELD J V. A high-resolution CMOS time-to-digital converter utilizing a vernier delay line [J]. IEEE Trans. Instrum. Meas., 2001,35(2):240-247.[5] WU J,SHI Z,WANG I Y. Firmware-only implementation of time-to-digital converter in field programmable gate array [J]. IEEE Conf. Rec. NSS.,2003,1:177-181.[6] SONG J,QI A,LIU S B. A high-resolution time-to-digital converter implemented in field programmable gate array [J]. IEEE Trans. Nucl. Sci., 2006,53(1):236-241.[7] MAXIM COMPANY. INL/DNL measurements for high-speed analog-to-digital converters (ADCs) .http: //www.maxim-ic.com/support[8] Application Brief 135. Ripple-Gray Code Counters [M]. Altera Corp, 2003.[9] XILINX COMPANY. Virtex-II, Virtex-II pro, Virtex-IV, Virtex-V, and Virtex-VI Complete Data Sheet . http://china.xilinx.com.[10] CORMEN T H,LESIERSON C E,RIVEST R L,et al.. Introduction to Algorithms. [M]. 2nd ed. New York:McGraw-Hill, 2001.[11] ANALOG D. Digital Programmable Delay Generator AD9500. http://www.analog.com.

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