Design of digital EMCCD camera with mega pixels

YANG Shao-hua; GUO Ming-an; LI Bin-kang; XIA Jing-tao; SUN Feng-rong

doi:10.3788/OPE.20111912.2970

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Design of digital EMCCD camera with mega pixels

Article | 更新时间：2020-08-12

- Design of digital EMCCD camera with mega pixels
- Optics and Precision Engineering Vol. 19, Issue 12, Pages: 2970-2976(2011)
- 作者机构：
  
  西北核技术研究所西安,710024
- 作者简介：
- 基金信息：
- DOI：10.3788/OPE.20111912.2970
  CLC： TN386.5;TB853.9
- Received：12 April 2011，
  
  Revised：21 June 2011，
  
  Published Online：25 December 2011，
  
  Published：25 December 2011
- 稿件说明：
移动端阅览
杨少华, 郭明安, 李斌康, 夏惊涛, 孙凤荣. 百万像素电子倍增CCD数字化相机的设计[J]. 光学精密工程, 2011,19(12): 2970-2976

YANG Shao-hua, GUO Ming-an, LI Bin-kang, XIA Jing-tao, SUN Feng-rong. Design of digital EMCCD camera with mega pixels[J]. Editorial Office of Optics and Precision Engineering, 2011,19(12): 2970-2976
杨少华, 郭明安, 李斌康, 夏惊涛, 孙凤荣. 百万像素电子倍增CCD数字化相机的设计[J]. 光学精密工程, 2011,19(12): 2970-2976 DOI： 10.3788/OPE.20111912.2970.

YANG Shao-hua, GUO Ming-an, LI Bin-kang, XIA Jing-tao, SUN Feng-rong. Design of digital EMCCD camera with mega pixels[J]. Editorial Office of Optics and Precision Engineering, 2011,19(12): 2970-2976 DOI： 10.3788/OPE.20111912.2970.

摘要

论述了一种基于1 024 pixel1 024 pixel电子倍增(EM)CCD图像传感器(CCD201)的数字化相机设计方法。利用复杂可编程逻辑器件(CPLD)产生CCD逻辑时序及视频同步处理控制时序;采用集成器件与分立器件相结合的方式实现EMCCD垂直驱动时序

获得视频信号;使用带有相关双采样(CDS)功能的16位模数转换器对CCD视频信号进行数字化。介绍了时序控制、驱动电路、视频处理电路等关键组成部分的技术实现方法。实验结果显示

数字化相机前端能够连续输出16位数字图像数据

光动态范围大于70 dB

电子增益采用程控方式

增益倍数最高能够大于50 dB。该设计方法已成功应用于远程EMCCD图像采集系统中

设计的系统能够在微光成像及辐射场诊断中应用。

Abstract

A design method for the digital camera based on a back illuminated 1 024 pixel1 024 pixel Electron Multiplying(EM)CCD image sensor is proposed. The Complex Programming Logical Device(CPLD) is adopted to generate the CCD driver timing and video processing timing

EL7156C pin driver chip is used for standard EMCCD clocks

and a discrete circuit is used for EM clock. By adopting a CCD analog front-end chip VSP2566 with Correlation Double Sampling(CDS) function to sample

the image data of the CCD output are digitized. The design methods of logic timing control

driver circuit

and video processing circuit are introduced. Experiments show that the digital camera circuit can output 16 bit digital image data simultaneously at a speed of 8 frame/s

its optical dynamic range can exceed 70 dB

and the remote programmable control electron multiplication can operate at the gain more than 50 dB. The design has been used in the remote EMCCD imaging system

and also can be applied to the low light level imaging area and radiation diagnosis field.

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Keywords

references

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