外同步式时间延迟积分 CCD传感器模拟装置

刘辉; 司国良; 郭永飞

doi:10.3788/OPE.20122005.1110

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外同步式时间延迟积分 CCD传感器模拟装置

信息科学 | 更新时间：2020-08-12

- 外同步式时间延迟积分 CCD传感器模拟装置
- TDI CCD simulation instrument synchronized with clocking signals
- 光学精密工程 2012年20卷第5期页码：1110-1116
- 作者机构：
  
  中国科学院长春光学精密机械与物理研究所,吉林长春,中国,130033
- 作者简介：
- 基金信息：
  
  国家自然科学基金资助项目(No.61036105)()
- DOI：10.3788/OPE.20122005.1110
  中图分类号： TP73;TN386.5
- 收稿日期：2011-09-23，
  
  修回日期：2011-11-06，
  
  网络出版日期：2012-05-10，
  
  纸质出版日期：2012-05-10
- 稿件说明：
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刘辉, 司国良, 郭永飞. 外同步式时间延迟积分 CCD传感器模拟装置[J]. 光学精密工程, 2012,20(5): 1110-1116

LIU Hui, SI Guo-liang, GUO Yong-fei. TDI CCD simulation instrument synchronized with clocking signals[J]. Editorial Office of Optics and Precision Engineering, 2012,20(5): 1110-1116
刘辉, 司国良, 郭永飞. 外同步式时间延迟积分 CCD传感器模拟装置[J]. 光学精密工程, 2012,20(5): 1110-1116 DOI： 10.3788/OPE.20122005.1110.

LIU Hui, SI Guo-liang, GUO Yong-fei. TDI CCD simulation instrument synchronized with clocking signals[J]. Editorial Office of Optics and Precision Engineering, 2012,20(5): 1110-1116 DOI： 10.3788/OPE.20122005.1110.

摘要

由于时间延迟积分(TDI)CCD传感器在调试阶段易损坏

本文提出了一种基于外同步信号驱动原理的TDI CCD传感器模拟装置。该模拟装置实际尺寸可以达到长100 mm

宽45 mm

与实际TDI CCD传感器的物理尺寸相当

可根据实际光照度大小精确地模拟TDI CCD传感器像元感光程度。该装置可以模拟TDI CCD传感器输入引脚的阻容特性并能合成完整的TDI CCD视频输出信号

实现TDI CCD传感器的16、32、48或64级积分级数控制的功能。该装置还可以模拟CCD驱动信号和输出视频信号的温度延时特性

延时时间在0.5~12.5 ns间可调

从而方便了信号采样电路对采样时刻的调试。

Abstract

To avoid the damage of Time Delay and Integration(TDI) CCD sensors in the experimental process

a TDICCD simulation instrument synchronized with input driving clocks is introduced. The simulation instrument is designed with a simple method to meet its physical size in a length of 100 mm and a width of 45 mm. As the size is same as that of a real TDI CCD sensor

the instrument can simulate the photonic characteristics of the pixels for TDI CCD sensors exactly. Furthermore

it can simulate the electrical characteristics of pins in the TDI CCD sensor and can synthesize a complete video output signal

by which an important function

selectable TDI stages with 16

48 or 64 stage

is available. Moreover

the instrument can be taken to simulate the thermal delay characteristic between the input driving clock and output OS signals in the temperature adjustable range of 0.5~12.5 ns

which is convenient to the sample time adjustment for the signal circuit.

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references

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